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| LRI512 Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S. FEATURES SUMMARY s ISO15693 Standard: Fully Compliant s 13.56 MHz 7 kHz Carrier Frequency s To the LRI512: 10% or 100% ASK modulation using: - 1/4 pulse position coding (26 kbit/s) - 1/256 pulse position coding (1.6 kbit/s) s From the LRI512: Load modulation using Manchester coding with 423 kHz and 484 kHz subcarrier in: - Fast data rate (26 kbit/s) - Low data rate (6.6 kbit/s) s Internal Tuning Capacitor s 512 bits EEPROM with Block Lock Feature s 64-bit Unique Identifier (UID) s EAS features s READ block and WRITE block (32-bit blocks) s 5 ms Programming Time (typical) s More than 100,000 Erase/Write Cycles s More than 40 Year Data Retention Figure 1. Delivery Forms Antenna (A1T/ISOR, A1S/ISOR) Antenna (A2T/ISOK) Antenna (C40) Wafer July 2002 1/54 LRI512 SUMMARY DESCRIPTION The LRI512 is a contactless memory, powered by an externally transmitted radio wave. It is fully compliant with the ISO15693 recommendation for radio-frequency power and signal interface. The LRI512 contains 512 bits of Electrically Erasable Programmable Memory (EEPROM). The memory is organized as 16 blocks of 32 bits. Figure 2. Logic Diagram LRI512 Power Supply Regulator 512 bit EEPROM ASK Demodulator Manchester Load Modulator AC1 Table 2. LRI512 Memory Map Addr 0 0 1 2 3 4 5 6 7 8 9 10 11 7 8 15 16 23 24 31 User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area User Area AC0 12 13 AI04008B 14 15 The LRI512 is accessed by modulating the 13.56 MHz carrier frequency. Incoming data are demodulated from the received signal amplitude modulation (ASK, Amplitude Shift Keying). The received ASK wave is 10% or 100% modulated (amplitude modulation). The Data transfer rate is 1.6 kbit/s using the 1/256 pulse coding mode and 26 kbit/s using the 1/4 pulse coding modes. Outgoing data are generated by antenna load variation, using the Manchester coding, using one or two sub-carrier frequencies at 423 kHz and 484 kHz. The Data transfer rate is 6.6 kbit/s, in the low data rate mode, and 26 kbit/s, in the fast data rate mode. Table 1. Signal Names AC1 AC0 Antenna Coil Antenna Coil UID 0 UID 4 AFI UID 1 UID 5 UID 2 UID 6 UID 3 UID 7 Memory Mapping The LRI512 is divided in 16 blocks of 32 bits. Each block can be individually Write Protected using a specific Lock command. The User Area consists of blocks that are always accessible in READ. WRITE commands are possible if the addressed block is not locked. During a WRITE, the 32 bits of the block are replaced by the new 32-bit value. The LRI512 also has a 64-bit block that is used to store the 64-bit Unique Identifier (UID). This UID is compliant to the ISO15963 description, and its value is used during the anti-collision sequence (INVENTORY). This block is not accessible by the user, and the value is written by ST on the production line. The LRI512 also has an AFI register in which the Application Family Identifier is stored, for use in the anti-collision algorithm. 2/54 LRI512 Commands The LRI512 supports the following commands: - INVENTORY: used to perform the anti-collision sequence. - STAY QUIET: to put the LRI512 in quiet mode. The LRI512 is then deselected and does not respond to any command. - SELECT: used to select the LRI512. After this command, the LRI512 processes all READ/ WRITE commands with the Select_Flag set. - RESET TO READY: to put the LRI512 in the ready state. - READ BLOCK: to output the 32 bits of the selected block and its locking status. - WRITE BLOCK: to write the 32-bit value in the selected block, provided that it is not locked. - LOCK BLOCK: to lock the selected block. After this command, the block cannot be modified. - WRITE AFI: to write the 8-bit value in the AFI register, provided that it is not locked. - LOCK AFI: to lock the AFI register. - ACTIVATE EAS: to set the non volatile EAS bit. When the EAS bit is set, the LRI512 answers to the POOL EAS command. - DEACTIVATE EAS: to reset the non volatile EAS bit, so that the LRI512 no longer answers to the POOL EAS command. - POOL EAS: used to request all LRI512s in the Reader field to generate the EAS signal, provided that their EAS bit is set. Initial Dialogue for Vicinity Cards The dialogue between the Vicinity Coupling Device (VCD) and the Vicinity Integrated Circuit Card (LRI512) is conducted through the following consecutive operations: - activation of the LRI512 by the RF operating field of the VCD. - transmission of a command by the VCD. - transmission of a response by the LRI512. These operations use the RF power transfer and communication signal interface specified in the following paragraphs. This technique is called Reader Talk First (RTF). Power Transfer Power transfer to the LRI512 is accomplished by radio frequency at 13.56 MHz via coupling antennas in the LRI512 and in the VCD. The RF operating field of the VCD is transformed on the LRI512 antenna as an AC voltage which is re-dressed, filtered and internally regulated. The amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator. Frequency The ISO15693 standard defines the carrier frequency (fc) of the operating field to be 13.56 MHz 7 kHz. Operating Field The LRI512 operates continuously between H min and Hmax. - The minimum operating field is Hmin and has a value of 150 mA/m rms. - The maximum operating field is Hmax and has a value of 5 A/m rms. A VCD shall generate a field of at least Hmin and not exceeding Hmax in the operating volume. 3/54 LRI512 COMMUNICATION SIGNAL FROM VCD TO LRI512 Figure 3. 100% Modulation Waveform Since the LRI512 is fully compliant with the ISO15693 recommendation, the descriptions and illustrations that follow are very heavily based on those of the ISO/IEC documents: ISO/IEC 15693a 2:2000(E) and ISO/IEC 15693-3:2001(E). This 105% 100% has been done with the kind permission of the ISO 95% Copyright Office. 60% Communications between the VCD and the LRI512 takes place using the modulation principle of ASK (amplitude modulation). Two modulation 5% indices are used, 10% and 100%. The LRI512 decodes both. The VCD determines which index is t used. tRFR tRFF tRFSBL The modulation index is defined as [a-b]/[a+b] AI06683 where a and b are the peak and minimum signal amplitude, respectively, of the carrier frequency. Depending of the choice made by the VCD, a "pause" will be created as described in Figure 3 and Figure 4. Table 3. 10% Modulation Parameters The LRI512 is operational for any degree of modulation index from between 10% and 30%. hr 0.1 x (a-b) max hf 0.1 x (a-b) max Figure 4. 10% Modulation Waveform hf hr tRFF tRFSFL tRFR a b t AI06655 4/54 LRI512 DATA RATE AND DATA CODING The data coding implemented in the LRI512 uses pulse position modulation. Both data coding modes that are described in the ISO15693 are supported by the LRI512. The selection is made by the VCD and indicated to the LRI512 within the Start of Frame (SOF). Data Coding Mode: 1 Out of 256 The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 18.88 s (256/fC), determines the value of the byte. In this Figure 5. 1 Out of 256 Coding Mode case the transmission of one byte takes 4.833 ms and the resulting data rate is 1.65 kbit/s (fC/8192). Figure 5 illustrates this pulse position modulation technique. In this figure, data E1h (225d) is sent by the VCD to the LRI512. The pause shall occur during the second half of the position of the time period that determines the value, as shown in Figure 6. A pause during the first period transmit the data value 00h. A pause during the last period transmits the data value FFh (255d). 9.44 s Pulse Modulated Carrier 18.88 s 01 2 3 .. . . . . . . .. . . . . . . . .. . . . . . . . 2 2 5 ..................... ..................... ..................... 4.833 ms 2 5 2 2 5 3 2 5 4 2 5 5 AI06656 Figure 6. Detail of One Time Period 9.44 s 18.88 s Pulse Modulated Carrier . . . . . . . 2 2 4 2 2 5 2 2 6 . . . . . . . Time Period one of 256 AI06657 5/54 LRI512 Data Coding Mode: 1 Out of 4 The value of 2 bits is represented by the position of one pause. The position of the pause on 1 of 4 successive time periods of 18.88 s (256/fC), determines the value of the 2 bits. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. In this case the transmission of one byte takes 302.08 s and the resulting data rate is 26.48 kbit/ s (fC/512). Figure 7 illustrates the 1 out of 4 pulse position technique and coding. Figure 7. 1 Out of 4 Coding Mode Pulse position for "00" 9.44 s 9.44 s 75.52 s Pulse position for "01" (1=LSB) 28.32 s 9.44 s 75.52 s Pulse position for "10" (0=LSB) 47.20s 9.44 s Pulse position for "11" 75.52 s 66.08 s 75.52 s 9.44 s AI06658 For example Figure 8 shows the transmission of E1h (225d, 1110 0001b) by the VCD. Figure 8. 1 Out of 4 Coding Example 10 00 01 11 75.52 s 75.52 s 75.52 s 75.52 s AI06659 6/54 LRI512 VCD to LRI512 Frames Frames are delimited by a Start of Frame (SOF) and an End of Frame (EOF) and are implemented using code violation. Unused options are reserved for future use. The LRI512 is ready to receive a new command frame from the VCD after a delay of t2 after having sent a response frame to the VCD (as specified in Table 59). The LRI512 generates a Power-on delay of tMINCD after being activated by the powering field (as specified in Table 59). After this delay, the LRI512 is ready to receive command frames from the VCD. Start of Frame (SOF) The SOF defines the data coding mode the VCD is to use for the following command frame. The SOF sequence described in Figure 9 selects the 1 out of 256 data coding mode. The SOF sequence described in Figure 10 selects the 1 out of 4 data coding mode. The EOF sequence for either coding mode is described in Figure 11. Figure 9. SOF to Select 1 Out of 256 Data Coding Mode 9.44 s 9.44 s 37.76 s 37.76 s AI06661 Figure 10. SOF to Select 1 Out of 4 Data Coding Mode 9.44 s 9.44 s 9.44 s 37.76 s 37.76 s AI06660 Figure 11. EOF for Either Data Coding Mode 9.44 s 9.44 s 37.76 s AI06662 7/54 LRI512 COMMUNICATIONS SIGNAL FROM LRI512 TO VCD ers mode, the LRI512 generates a continuous For some parameters several modes have been phase relationship between fS1 and fS2. defined in order to allow for use in different noise environments and application requirements. Data Rates Load Modulation The LRI512 can respond using the low or the high The LRI512 is capable of communication to the data rate format. The selection of the data rate is VCD via an inductive coupling area in which the made by the VCD using the second bit in the procarrier is loaded to generate a subcarrier with fretocol header. quency f S. The subcarrier is generated by switchTable 4 shows the different data rates the LRI512 ing in a load in the LRI512. can achieve using each combination. Subcarrier The LRI512 supports the one subcarrier and two Table 4. Response Data Rate subcarriers response formats. These formats are selected by the VCD using the first bit in the protoData Rate One Subcarrier Two Subcarriers col header. When one subcarrier is used, the frequency f S1 of 6.67 kbit/s 6.62 kbit/s Low (fC/2032) (fC/2048) the subcarrier load modulation is 423.75kHz (fC/ 32). 26.69 kbit/s 26.48 kbit/s High When two subcarriers are used, the frequency fS1 (fC/508) (fC/512) is 423.75 kHz (fC/32), and the frequency f S2 is 484.28 kHz (fC/28). When using the two subcarri- 8/54 LRI512 BIT REPRESENTATION AND CODING Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate the same subcarrier frequency or frequencies are used, in this case the number of pulses shall be multiplied by 4 and all times will increase by this factor. Bit Coding Using One Subcarrier High Data Rate. A logic 0 starts with 8 pulses of 423.75 kHz (fC/32) followed by an unmodulated time of 18,88s as shown in Figure 12. Figure 12. Logic 0, High Data Rate Low Data Rate. A logic 0 starts with 32 pulses of 423.75 kHz (fC/32) followed by an unmodulated time of 75.52 s as shown in Figure 14. Figure 14. Logic 0, Low Data Rate 149.86 s (ISO=151.04 s) AI06666 A logic 1 starts with an unmodulated time of 75.52 s followed by 32 pulses of 423.75 kHz (fC/ 32) as shown in Figure 15. 37.76 s AI06663 Figure 15. Logic 1, Low Data Rate A logic 1 starts with an unmodulated time of 18.88 s followed by 8 pulses of 423.75 kHz (fC/ 32) as shown in Figure 13. Figure 13. Logic 1, High Data Rate 149.86 s (ISO=151.04 s) AI06665 37.76 s AI06664 9/54 LRI512 Bit Coding Using Two Subcarriers High Data Rate. A logic 0 starts with 8 pulses of 423.75 kHz (fC/32) followed by 9 pulses of 484.28 kHz (fC/28) as shown in Figure 16. Figure 16. Logic 0, High Data Rate Low Data Rate. A logic 0 starts with 32 pulses of 423.75 kHz (fC/32) followed by 36 pulses of 484.28 kHz (fC/28) as shown in Figure 18. Figure 18. Logic 0, Low Data Rate 149.86 s 0.3 s 37.46 s AI06670 AI06668 A logic 1 starts with 9 pulses of 484.28 kHz (fC/28) followed by 8 pulses of 423.75 kHz (fC/32) as shown in Figure 17. Figure 17. Logic 1, High Data Rate A logic 1 starts with 36 pulses of 484.28 kHz (fC/ 28) followed by 32 pulses of 423.75 kHz (fC/32) as shown in Figure 19. Figure 19. Logic 1, Low Data Rate 149.86 s 0.3 s 37.46 s AI06669 AI06667 10/54 LRI512 LRI512 TO VCD FRAMES Frames are delimited by an SOF and EOF and are implemented using code violation. Unused options are reserved for future use. For the low data rate, the same subcarrier frequency or frequencies are used. In this case the number of pulses shall be multiplied by 4. The VCD is ready to receive a response frame from the LRI512 within less than t1 after having sent a command frame (as specified in Table 59). SOF When Using One Subcarrier High Data Rate. SOF comprises 3 parts: (see Figure 20) - an unmodulated time of 56.64 s, - 24 pulses of 423.75 kHz (fc/32), - a logic 1 which starts with an unmodulated time of 18.88 s followed by 8 pulses of 423.75 kHz. Low Data Rate. SOF comprises 3 parts: (see Figure 21) - an unmodulated time of 226.56 s, - 96 pulses of 423.75 kHz (fc/32), - a logic 1 which starts with an unmodulated time of 75.52 s followed by 32 pulses of 423.75 kHz. Figure 20. Start of Frame, High Data Rate, One Subcarrier 113.28 s 37.76 s AI06671 Figure 21. Start of Frame, Low Data Rate, One Subcarrier 453.12 s 149.86 s (ISO=151.04 s) AI06672 11/54 LRI512 SOF When Using Two Subcarriers High Data Rate. SOF comprises 3 parts: (see Figure 22) - 27 pulses of 484.28 kHz (fc/28), - 24 pulses of 423.75 kHz (fc/32), - a logic 1 which starts with 9 pulses of 484.28 kHz followed by 8 pulses of 423.75 kHz. Low Data Rate. SOF comprises 3 parts: (see Figure 23) - 108 pulses of 484.28 kHz (fc/28), - 96 pulses of 423.75 kHz (fc/32), - a logic 1 which starts with 36 pulses of 484.28 kHz followed by 32 pulses of 423.75 kHz. Figure 22. Start of Frame, High Data Rate, Two Subcarriers 112.39 s 37.76 s (ISO=37.46 s) AI06673 Figure 23. Start of Frame, Low Data Rate, Two Subcarriers 449.56 s 149.86 s 0.3 s AI06674 12/54 LRI512 EOF When Using One Subcarrier High Data Rate. EOF comprises 3 parts: (see Figure 24) - a logic 0 which starts with 8 pulses of 423.75 kHz followed by an unmodulated time of 18.88 s. - 24 pulses of 423.75 kHz (fc/32), - an unmodulated time of 56.64 s. Low Data Rate. EOF comprises 3 parts: (see Figure 25) - a logic 0 which starts with 32 pulses of 423.75 kHz followed by an unmodulated time of 75.52 s. - 96 pulses of 423.75 kHz (fc/32), - an unmodulated time of 226.56 s. Figure 24. End of Frame, High Data Rate, One Subcarrier 37.76 s 113.28 s AI06675 Figure 25. End of Frame, Low Data Rate, One Subcarrier 151.04 s 453.12 s AI06676 13/54 LRI512 EOF When Using Two Subcarriers High Data Rate. EOF comprises 3 parts: (see Figure 26) - a logic 0 which starts with 8 pulses of 423.75 kHz followed by 9 pulses of 484.28 kHz, - 24 pulses of 423.75 kHz (fc/32), - 27 pulses of 484.28 kHz (fc/28). Low Data Rate. EOF comprises 3 parts: (see Figure 27) - a logic 0 which starts with 32 pulses of 423.75 kHz followed by 36 pulses of 484.28 kHz, - 96 pulses of 423.75 kHz (fc/32), - 108 pulses of 484.28 kHz (fc/28). Figure 26. End of Frame, High Data Rate, Two Subcarriers 37.46 s 112.39 s AI06677 Figure 27. End of Frame, Low Data Rate, Two Subcarriers 151.62 s (ISO=149.86 s) 449.56 s AI06678 14/54 LRI512 UNIQUE IDENTIFIER (UID) The LRI512s are uniquely identified by a 64-bit Unique Identifier (UID). This UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read only code, and comprises: - The 8 MSB is E0h - The IC Manufacturer code of ST 02h, on 8 bits (ISO/IEC 7816-6/AM1) - A Unique Serial Number on 48 bits. The UID is used for addressing each LRI512 uniquely and individually, during the anti-collision loop and for one-to-one exchange between a VCD and a LRI512. Table 5. UID Format MSB 63 E0h 56 55 02h 48 47 LSB 0 Unique Serial Number APPLICATION FAMILY IDENTIFIER (AFI) The AFI (Application Family Identifier) describes the type of application targeted by the VCD, and is used to extract from all the LRI512s present only the LRI512s meeting the required application criteria. It is programmed by the LRI512 issuer in the AFI register. Once programmed and Locked, it cannot be modified. The most significant nibble of AFI is used to code one specific or all application families. The least significant nibble of AFI is used to code one specific or all application sub-families. Subfamily codes, other than 0, are proprietary. (See ISO 15693-3 documentation) Figure 28. LRI512 Decision Tree for AFI Inventory Request Received No AFI Flag Set ? Yes AFI value =0? Yes AFI value = Internal value ? Yes No No Answer given by the LRI512 to the Inventory Request No Answer AI06679 CRC The CRC used in the LRI512 is calculated as per the definition in ISO/IEC 13239. The initial register content is all ones: FFFFh. The 2-byte CRC is appended to each Request and each Response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field. Upon reception of a Request from the VCD, the LRI512 verifies that the CRC value is valid. If it is invalid, it discards the frame, and does not answer the VCD. Upon reception of a Response from the LRI512, it is recommended that the VCD verify that the CRC value is valid. If it is invalid, actions to be performed are left to the responsibility of the VCD designer. The CRC is transmitted Least Significant Byte first. Each byte is transmitted Least Significant Bit first. Table 6. CRC Transmission Rules LSByte LSBit MSBit CRC 16 (8bits) LSBit MSByte MSBit CRC 16 (8 bits) 15/54 LRI512 LRI512 PROTOCOL DESCRIPTION The Transmission protocol defines the mechanism to exchange instructions and data between the VCD and the LRI512, in both directions. It is based on the concept of "VCD talks first". This means that any LRI512 does not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of - a Request from the VCD to the LRI512 - a Response from the LRI512 to the VCD Each Request and each Response is contained in a Frame. The frame delimiters (SOF, EOF) are described in the previous paragraphs. Each Request consists of - Request SOF (see Figure 9 and Figure 10) - Flags - A Command Code - Parameters, depending on the Command - Application data - 2-byte CRC - Request EOF (see Figure 11) Table 7. VCD Request Frame Format Request SOF Request Flags Command Code Parameters Data 2 Bytes CRC Request EOF Each Response consists of - Answer SOF (see Figure 20 to Figure 23) - Flags - Parameters, depending on the Command - Application data - 2-byte CRC - Answer EOF (see Figure 24 to Figure 27) The protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8) - that is, an integer number of bytes. A single-byte field is transmitted Least Significant Bit (LSBit) first. A multiple-byte field is transmitted Least Significant Byte (LSByte) first, each byte is transmitted Least Significant Bit (LSBit) first. The setting of the flags indicates the presence of the optional fields. When the flag is set (to one), the field is present. When the flag is reset (to zero), the field is absent. Table 8. LRI512 Response Frame Format Response SOF Response Flags Parameters Data 2 Bytes CRC Response EOF Figure 29. LRI512 Protocol Timing VCD Request Frame (Table 7) Response Frame (Table 8) Request Frame (Table 7) Response Frame (Table 8) LRI512 Timing t1 t2 t1 t2 AI06830 16/54 LRI512 LRI512 STATES A LRI512 can be in one of four states: - Power-off - Ready - Quiet - Selected Transitions between these states are specified in Figure 30 and Table 9. Power-off State The LRI512 is in the Power-off state when it does not receive enough energy from the VCD. Ready State The LRI512 is in the Ready state when it receives enough energy from the VCD. It shall answer any Request where the Select_Flag is not set. Quiet State When in the Quiet State, the LRI512 answers any Request other than an Inventory Request with the Address_Flag set. Selected State In the Selected State, the LRI512 answers to any Request in all modes: - Request in Select mode with the Select flag set - Request in Addressed mode if the UID match. - Request in Non-Addressed mode as it is general Request. Table 9. LRI512 Response, Depending on the States of the Request Flags Address_Flag Flags 1 Addressed 0 Non Addressed X X X X X X X Select_Flag 1 Selected 0 Non Selected X LRI512 in Ready or Selected state (Devices in Quiet state do not answer) LRI512 in Selected state LRI512 in Ready, Quiet or Selected state (the device which match the UID) Error (03h) 17/54 LRI512 Figure 30. LRI512 State Transition Diagram Power Off In field Out of field Any other Command where Select_Flag is not set Out of field Selected Ready Out of field uie t (U ID ) y Re s et to re ad e er r ) ID wh o y et D) (U ad s UI ct le re is t o ag en Se t t Fl er se ct_ diff Re ele ect( S el S Select (UID) Quiet Stay quiet(UID) Any other command where the Address_Flag is set AND where Inventory_Flag is not set St a yq Any other command AI06681 Note: The intention of the state transition method is that only one LRI512 should be in the selected state at a time. 18/54 LRI512 MODES The set of LRI512s that can answer a given Request are those whose current "Mode" is the appropriate one for that request. Addressed Mode When the Address_flag is set to 1 (addressed mode), the Request shall contain the Unique ID (UID) of the addressed LRI512. Any LRI512 receiving a Request with the Address_flag set to 1 shall compare the received Unique ID to its own UID. If it matches, it shall execute it (if possible) and return a Response to the VCD as specified by the command description. If it does not match, it shall remain silent. Non-Addressed mode (General Request) When the Address_flag is set to 0 (non-addressed mode), the Request shall not contain a Unique ID. Any LRI512 receiving a Request with the Address_flag set to 0 executes it and returns a Response to the VCD as specified by the command description. Select Mode When the Select_flag is set to 1 (select mode), the Request shall not contain a LRI512 Unique ID. The LRI512 in the Selected State receiving a Request with the Select_flag set to 1 executes it and returns a Response to the VCD as specified by the command description. Only LRI512s in the Selected State answer to a Request having the Select Flag set to 1. The system design ensures in theory that only one LRI512 can be in the Select state. 19/54 LRI512 REQUEST FORMAT The Request consists of - SOF - Flags - A Command Code - Parameters and Data - CRC - EOF Table 10. General Request Format S Request Command O Parameters Flags Code F Data E CRC O F Bit 7 Option flag Bit 8 RFU Bit 6 Address flag 1 0 Bit 5 Select flag 1 Table 12. Request Flags 5 to 8 when Bit 3 = 0 0 Request shall be executed by any LRI512 according to the setting of Address_flag Request shall be executed only by LRI512 in Selected State Request is not addressed. UID field is not present. It shall be executed by all LRI512. Request is addressed. UID field is present. It shall be executed only by the LRI512 whose UID matches the UID specified in the Request. Request Flags In a Request, the flags field specifies the actions to be performed by the LRI512, and whether corresponding fields are present or not. It consists of eight bits. The bit 3 (Inventory_flag) of the request flag defines the content of the 4 MSBs (bits 5 to 8). When bit 3 is reset (0), bits 5 to 8 define the LRI512 selection criteria. When bit 3 is set (1), bits 5 to 8 define the LRI512 Inventory parameters. Table 11. Request Flags 1 to 4 Definition 0 Bit 1 Sub-carrier flag 1 Data_rate flag 0 1 0 Bit 3 Inventory flag 1 Protocol Extension flag A single sub-carrier frequency shall be used by the LRI512 Two sub-carriers shall be used by the LRI512 Low data rate is used High data rate is used Flags 5 to 8 meaning are according to Table 12 Flags 5 to 8 meaning are according to Table 13 No Protocol format extension 0 0 Note: if the Select_flag is set to 1, the Address_flag shall be set to 0 and the UID field shall not be present in the Request. Table 13. Request Flags 5 to 8 when Bit 3 = 1 0 Bit 5 AFI flag 1 0 Bit 6 Nb_slots flag 1 Bit 7 Bit 8 Option flag RFU 0 0 1 slot AFI field is present 16 slots AFI field is not present Bit 2 Bit 4 0 Note: 1. Sub-carrier_flag refers to the LRI512-to-VCD communication. 2. Data_rate_flag refers to the LRI512-to-VCD communication 20/54 LRI512 RESPONSE FORMAT The Response consists of - SOF - Flags - Parameters and Data - CRC - EOF Table 16. Response Error Code Definition Table 14. General Response Format Response SOF Parameters Flags Data CRC EOF Error Code 03h 10h 11h 12h Meaning The option is not supported The specified block is not available The specified block is already locked and thus cannot be locked again The specified block is locked and its content cannot be changed. Response Error Code If the Error Flag is set by the LRI512 in the Response, the Error Code field is present and provides information about the error that occurred. The following error codes are specified. Other codes are reserved for future use. Response Flags In a Response, the flags field indicates how actions have been performed by the LRI512 and whether corresponding fields are present or not. It consists of eight bits. Table 15. Response Flags 1 to 8 definition 0 Bit 1 Error flag 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 RFU RFU Extension flag RFU RFU RFU RFU 0 0 0 0 0 0 0 No extension No error Error detected. Error code is in the "Error" field. 21/54 LRI512 ANTI-COLLISION The purpose of the anti-collision sequence is to inventory the LRI512s present in the VCD field by their unique ID (UID). The VCD is the master of the communication with one or multiple LRI512s. It initiates LRI512 communication by issuing the Inventory Request. The LRI512 sends its Response in the slot determined, or might not respond. Request parameters When issuing the Inventory Command, the VCD shall: - set the Nb_slots_flag to the desired setting, - add after the Command Field the Mask Length and the Mask Value, - The Mask Length is the number of significant bits of the Mask Value. - The Mask Value is contained in an integer number of bytes. The Mask Length indicates the number of significant bits. LSB shall be transmitted first. - If the Mask Length is not a multiple of 8 bits, the Mask Value MSB shall be padded with the required number of null bits (set to 0) so that the Mask Value is contained in an integer number of bytes. - The next field starts on the next byte boundary. Table 17. Inventory Request Format MSB SOF Request Flags 8 bits Command 8 bits Optional AFI 8 bits Mask Length 8 bits Mask Value 0 to 8 bytes CRC 16 bits LSB EOF In the example of the Table 18 and Figure 31, the Mask Length is 11 bits. The Mask Value MSB is padded with five bits set to 0. The 11 bits Mask plus the current slot number is compared to the UID. Table 18. Example of the Padding of a 11 bits Mask Value (b15) MSB 0000 0 Pad LSB (b0) 100 1100 1111 11 bits Mask Value 22/54 LRI512 Figure 31. Principle of Comparison between the Mask, Slot Number and UID Mask value received in the Inventory command MSB LSB 0000 0100 1100 1111 b 16 bits MSB LSB 100 1100 1111 b 11 bits The Mask value less the padding 0s is loaded into the Tag comparator The Slot counter is calculated Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits MSB LSB xxxx 4 bits The Slot counter is concatened to the Mask value Nb_slots_flags = 0 MSB LSB xxxx 100 1100 1111 b 15 bits The concatenated result is compared with the least significant bits of the Tag UID. UID b63 b0 xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx b Bits ignored Compare 64 bits AI06682 The AFI field shall be present if the AFI_flag is set. The pulse shall be generated according to the definition of the EOF in ISO/IEC 15693-2. The first slot starts immediately after the reception of the Request EOF. To switch to the next slot, the VCD sends an EOF. The following rules and restrictions apply: - if no LRI512 answer is detected, the VCD may switch to the next slot by sending an EOF - if one or more LRI512 answers are detected, the VCD shall wait until the complete frame has been received before sending an EOF for switching to the next slot. 23/54 LRI512 REQUEST PROCESSING BY THE LRI512 Upon reception of a valid Request, the LRI512 performs the following algorithm, where: - NbS is the total number of slots (1 or 16) - SN is the current slot number (0 to 15) - LSB (value, n) function returns the n least significant bits of the value - MSB (value, n) function returns the n most significant bits of the value - "&" is the concatenation operator - Slot_Frame is either a SOF or an EOF SN = 0 if (Nb_slots_flag) then NbS = 1 SN_length = 0 endif else NbS = 16 SN_length = 4 endif label1: if LSB(UID, SN_length + Mask_length) = LSB(SN,SN_length)&LSB(Mask,Mask_length) then answer to inventory request endif wait (Slot_Frame) if Slot_Frame = SOF then Stop Anticollision decode/process request exit endif if Slot_Frame = EOF if SN < NbS-1 then = SN + 1 SN goto label1 exit endif endif EXPLANATION OF THE POSSIBLE CASES Figure 32 summarizes the main possible cases that can occur during an anti-collision sequence when the slot number is 16. The different steps are: - The VCD sends an Inventory Request, in a frame, terminated by an EOF. The number of slots is 16. - LRI512 #1 transmits its Response in Slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; - The VCD sends an EOF, meaning to switch to the next slot. - In slot 1, two LRI512s, #2 and #3, transmit their Responses. This generates a collision. The VCD records it, and remembers that a collision was detected in Slot 1. - The VCD sends an EOF, meaning to switch to the next slot. - In Slot 2, no LRI512 transmits a Response. Therefore the VCD does not detect a LRI512 SOF and decides to switch to the next slot by sending an EOF. - In slot 3, there is another collision caused by Responses from LRI512 #4 and #5 - The VCD then decides to send a Request (for instance a Read Block) to LRI512 #1, whose UID was already correctly received. - All LRI512s detect a SOF and exit the anti-collision sequence. They process this Request and since the Request is addressed to LRI512 #1, only LRI512 #1 transmits its Response. - All LRI512s are ready to receive another Request. If it is an Inventory command, the slot numbering sequence restarts from 0. Note: the decision to interrupt the anti-collision sequence is up to the VCD. It could have continued to send EOFs until Slot 15 and then send the Request to LRI512 #1. 24/54 Slot 0 Slot 1 Slot 2 Slot 3 VCD SOF Inventory EOF Request EOF EOF EOF Response 2 Response 4 SOF Request to EOF LRI512 1 LRI512s Response from LRI512 1 Response 1 Response 3 Response 5 Figure 32. Description of a Possible Anti-collision Sequence Timing t1 t2 t1 t2 t3 t1 t2 t1 Comment Collision No collision No Response Collision Time LRI512 AI06831 25/54 LRI512 TIMING DEFINITION t1: LRI512 Response Delay t1 is as defined in Table 19. Upon detection of the rising edge of the EOF received from the VCD, the LRI512 wait for a time equal to t1(typ) = 4352/fC (see Table 59) before starting to transmit its response to a VCD request or switch to the next slot when in an inventory process. The EOF is defined in page 7. t2: VCD New Request Delay t2 is the time after which the VCD may send an EOF to switch to the next slot when one or more LRI512 responses have been received during an inventory command. It starts from the reception of the EOF received from the LRI512s. The EOF sent by the VCD may be either 10% or 100% modulated independent of the modulation index used for transmitting the VCD request to the LRI512. t2 is also the time after which the VCD may send a new request to the LRI512 as described in Figure 29., LRI512 Protocol Timing, on page 16. t2(min) = 4192/fC (see Table 59) t3: VCD New Request Delay when No LRI512 Response t3 is the time after which the VCD may send an EOF to switch to the next slot when no LRI512 response has been received. The EOF sent by the VCD may be either 10% or 100% modulated independent of the modulation index used for transmitting the VCD request to the LRI512. From the time the VCD has generated the rising edge of an EOF: - If this EOF is 100% modulated, the VCD shall wait a time at least equal to t3minimum before sending a subsequent EOF. - If this EOF is 10% modulated, the VCD shall wait a time at least equal to the sum of t3minimum + the nominal response time of a LRI512, which depend on the LRI512 data rate and subcarrier modulation mode before sending a subsequent EOF. Table 19. Timing Values (see Table 59) Min. t1 t2 t3 t1(min) t2(min) t1(max) + tSOF (notes1,2) Nominal t1(typ) -- -- Max. t1(max) -- -- Note: 1. tSOF is the duration for the LRI512 to transmit an SOF to the VCD. tSOF is dependant on the current data rate: High data rate or Low data rate. 2. t1(max) does not apply for write alike requests. Timing conditions for write alike requests are defined in the command description. 3. The tolerance of specific timings is 32/fC. 26/54 LRI512 COMMAND CODES The LRI512 supports the following command codes: Table 20. Command Codes Command Code 0x01 0x02 0x20 0x21 0x22 0x25 0x26 0x27 0x28 0xA0 0xA1 0xA2 Inventory Stay Quiet Read Single Block Write Single Block Lock Block Select Reset to Ready Write AFI Lock AFI Activate EAS De-activate EAS POOL EAS Function 27/54 LRI512 INVENTORY Command Code = 0x01 When receiving the Inventory request, the LRI512 performs the anti-collision sequence. The Inventory_flag shall be set to 1. The Meaning of Flags 5 to 8 is according to Table 13., Request Flags 5 to 8 when Bit 3 = 1, on page 20. The Request (Table 21) contains: - Flags, - Inventory Command code - AFI if the AFI flag is set - Mask Length - Mask Value - CRC The Response (Table 22) contains: - Flags - DSFID (always 00h) - Unique ID Table 21. Inventory Request Format Request SOF Request Flags 8 bits Inventory 0x01 Optional AFI Mask Length 8 bits 8 bits Mask Value 0 - 64 bits CRC16 16 bits Request EOF Note on Inventory Operation. In the current LRI512 device, it is not possible to use the full range of Mask Length capability to covert the complete INVENTORY sequence. Values above the ones mentioned are not allowed: - 16 slots mode (Request flag b6=0): Mask Length must be in the range 0 to 27. - 1 slot mode (Request flag b6=1): Mask Length must be in the range 0 to 20. STMicroelectronics programs the UID in such a way that it guarantees that the anti-collision sequence is able to detect all LRI512 in the reader field. Table 22. Inventory Response Format Response SOF Response Flags 8 bits DSFID 0x00 UID 64 bits CRC16 16 bits Response EOF 28/54 LRI512 STAY QUIET Command Code = 0x02 When receiving the Stay Quiet command, the LRI512 enters the Quiet State, and does not send back a Response. There is no response to the Stay Quiet Command. When in the Quiet State: - the LRI512 does not process any Request if Inventory_flag is set, - the LRI512 processes any addressed Request Table 23. Stay Quiet Request Format Request SOF Request Flags 8 bits Stay Quiet 0x02 UID 64 bits CRC16 16 bits Request EOF The LRI512 exits the Quiet State when: - reset (power off) - receiving a Select request. It then goes to the Selected state - receiving a Reset to Ready request. It then goes to the Ready state. The Stay Quiet Command (Table 23) shall always be executed in Addressed Mode (Select_Flag is set to 0 and Address_Flag is set to 1). Figure 33. STAY QUIET Frame Exchange between VCD and LRI512 VCD SOF Stay Quiet Request EOF AI06842 29/54 LRI512 READ SINGLE BLOCK Command Code = 0x20 When receiving the Read Single Block Command, the LRI512 read the requested block and send back its 32 bits value in the Response.The Option_Flag is supported. Request parameter (Table 24): - Option_Flag - UID (Optional) - Block Number Response parameter (Table 25): - Block Locking Status if Option_Flag is set - 4 bytes of Block Data Response parameter (Table 27): - Error Code as Error_Flag is set Table 24. Read Single Block Request Format Request SOF Request Flags 8 bits Read Single Block 0x20 UID 64 bits Block Number 8 bits CRC16 16 bits Request EOF Table 25. Read Single Block Response Format when Error_Flag is NOT Set Response SOF Response Flags 8 bits Block Locking Status 8 bits Data 32 bits CRC16 16 bits Response EOF Table 26. b7 (bit b0 for ISO) 0: Current Block not locked 1: Current Block locked b6 b5 b4 b3 b2 b1 b0 Reserved for future used. All at 0 Table 27. Read Single Block Response Format when Error_Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 34. READ Single Block Frame Exchange between VCD and LRI512 VCD SOF Read Single Block Request EOF LRI512 t1 SOF Read Single Block Response EOF AI06832 30/54 LRI512 WRITE SINGLE BLOCK Command Code = 0x21 When receiving the Write Single Block Command, the LRI512 writes the requested block with the data contained in the Request, and reports the success of the operation in the Response. The Option_Flag is not supported. During the write cycle, tW, no modulation (neither 100% nor 10%) shall occur, otherwise the LRI512 may program the data incorrectly in the memory. The tW delay is a multiple of t1nominal. Request parameter (Table 28): - UID (Optional) - Block Number - Data Response parameter (Table 29): - No parameter. The response is sent back after the write cycle Response parameter (Table 30): - Error Code as Error_Flag is set Table 28. Write Single Block Request Format Request SOF Request Flags 8 bits Write Single Block 0x21 UID 64 bits Block Number 8 bits Data 32 bits CRC16 16bits Request EOF Table 29. Write Single Block Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 30. Write Single Block Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 35. WRITE Single Block Frame Exchange between VCD and LRI512 Write Single Block Request VCD SOF EOF LRI512 t1 SOF Write Single Block Response EOF Write sequence when error LRI512 tw t1 SOF Write Single Block Response EOF AI06833 31/54 LRI512 LOCK BLOCK Command Code = 0x22 When receiving the Lock Block Command, the LRI512 lock permanently the requested block. The Option_Flag is not supported. During the write cycle tW, no modulation (never 100% nor 10%) shall occur. If so, the LRI512 may not lock correctly the memory block. The tW delay is a multiple of t 1nominal. Request parameter (Table 31): - (Optional) UID - Block Number Response parameter (Table 32): - No parameter. Response parameter (Table 33): - Error Code as Error_Flag is set Table 31. Lock Single Block Request Format Request SOF Request Flags 8 bits Lock Block 0x22 UID 64 bits Block Number 8 bits CRC16 16 bits Request EOF Table 32. Lock Block Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 33. Lock Block Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 36. LOCK Block Frame Exchange between VCD and LRI512 VCD SOF Lock Block Request EOF LRI512 t1 SOF Lock Block Response EOF Lock sequence when error LRI512 tw t1 SOF Lock Block Response EOF AI06834 32/54 LRI512 SELECT Command Code = 0x25 When receiving the Select Command: - if the UID is equal to its own UID, the LRI512 enter or stay in the Selected state and send a Response. - if it is different, the selected LRI512 return to the Ready state and do not send a Response. Table 34. Select Request Format Request SOF Request Flags 8 bits Select 0x25 UID 64 bits CRC16 16 bits Request EOF Request parameter (Table 34): - UID Response parameter (Table 35): - No parameter. Response parameter (Table 36): - Error Code as Error_Flag is set Table 35. Select Block Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 36. Select Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 37. SELECT Frame Exchange between VCD and LRI512 VCD SOF Select Request EOF LRI512 t1 SOF Select Response EOF AI06835 33/54 LRI512 RESET TO READY Command Code = 0x26 When receiving a Reset to Ready Command, the LRI512 return to the Ready state. Request parameter (Table 37): - UID (Optional) Response parameter (Table 38): - No parameter. Response parameter (Table 39): - Error Code as Error_Flag is set Table 37. Reset to Ready Request Format Request SOF Request Flags 8 bits Reset to Ready 0x26 UID 64 bits CRC16 16 bits Request EOF Table 38. Reset to Ready Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 39. Reset to ready Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 38. RESET to READY Frame Exchange between VCD and LRI512 VCD SOF Reset to Ready EOF Request Reset to Ready Response LRI512 t1 SOF EOF AI06836 34/54 LRI512 WRITE AFI Command Code = 0x27 When receiving the Write AFI Request, the LRI512 write the AFI byte value into its memory. The Option_Flag is not supported. During the write cycle tW, no modulation (never 100% nor 10%) shall occur. If so, the LRI512 may not Write correctly the AFI value into the memory. The tW delay is a multiple of t1nominal. Table 40. Write AFI Request Format Request SOF Request Flags 8 bits Write AFI 0x27 UID 64 bits AFI 8 bits CRC16 16 bits Request EOF Request parameter (Table 40): - UID (Optional) - AFI Response parameter (Table 41): - No parameter. Response parameter (Table 42): - Error Code as Error_Flag is set Table 41. Write AFI Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 42. Write AFI Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 39. WRITE AFI Frame Exchange between VCD and LRI512 VCD SOF Write AFI Request EOF LRI512 t1 SOF Write AFI Response EOF Write sequence when error LRI512 tw t1 SOF Write AFI Response EOF AI06837 35/54 LRI512 LOCK AFI Command Code = 0x28 When receiving the Lock AFI Request, the LRI512 lock the AFI value permanently. The Option_Flag is not supported. During the write cycle tW, no modulation (never 100% nor 10%) shall occur. If so, the LRI512 may not Lock correctly the AFI value into the memory. The tW delay is a multiple of t1nominal. Table 43. Lock AFI Request Format Request SOF Request Flags 8 bits Lock AFI 0x28 UID 64 bits CRC16 16 bits Request EOF Request parameter (Table 43): - UID (Optional) Response parameter (Table 44): - No parameter. Response parameter (Table 45): - Error Code as Error_Flag is set Table 44. Lock AFI Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 45. Lock AFI Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 40. LOCK AFI Frame Exchange between VCD and LRI512 VCD SOF Lock AFI Request EOF LRI512 t1 SOF Lock AFI Response EOF Lock sequence when error LRI512 tw t1 SOF Lock AFI Response EOF AI06838 36/54 LRI512 ACTIVATE EAS Command Code = 0xA0 When receiving the Activate EAS Request, the LRI512 set the non-volatile EAS bit. The Option_Flag is not supported. During the write cycle tW, no modulation (never 100% nor 10%) shall occur. If so, the LRI512 may not set correctly the EAS bit. The tW delay is a multiple of t1nominal. Request parameter (Table 46): - UID (Optional) Response parameter (Table 47): - No parameter. Response parameter (Table 48): - Error Code as Error_Flag is set Table 46. Activate EAS Request Format Request SOF Request Flags 8 bits Activate EAS 0xA0 IC Mfg code 0x02 UID 64 bits CRC16 16 bits Request EOF Table 47. Activate EAS Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 48. Activate EAS Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 41. ACTIVATE EAS Frame Exchange between VCD and LRI512 VCD SOF Activate EAS Request EOF LRI512 t1 SOF Activate EAS Response EOF Write sequence when error LRI512 tw t1 SOF Activate EAS Response EOF AI06839 37/54 LRI512 DESACTIVATE EAS Command Code = 0xA1 When receiving the De-activate EAS Request, the LRI512 reset the non-volatile EAS bit. The Option_Flag is not supported. During the write cycle tW, no modulation (never 100% nor 10%) shall occur. If so, the LRI512 may not reset correctly the EAS bit. The tW delay is a multiple of t1nominal. Table 49. De-activate EAS Request Format Request SOF Request Flags 8 bits De-activate EAS 0xA1 IC Mfg code 0x02 UID 64 bits CRC16 16 bits Request EOF Request parameter (Table 49): - UID (Optional) Response parameter (Table 50): - No parameter. Response parameter (Table 51): - Error Code as Error_Flag is set Table 50. De-activate EAS Response Format when Error Flag is NOT Set Response SOF Response_Flags 8 bits CRC16 16 bits Response EOF Table 51. De-activate EAS Response Format when Error Flag is Set Response SOF Response_Flags 8 bits Error Code 8 bits CRC16 16 bits Response EOF Figure 42. DE-ACTIVATE EAS Frame Exchange between VCD and LRI512 VCD SOF De-activate EAS Request EOF LRI512 t1 SOF De-activate EAS Response EOF Write sequence when error LRI512 tw t1 SOF De-activate EAS Response EOF AI06840 38/54 LRI512 POOL EAS Command Code = 0xA2 When receiving the POOL EAS Request, all LRI512 with the non-volatile EAS bit set generate the EAS signal. Request parameter (Table 52 or Table 53): - No parameter Table 52. POOL EAS Request Format for One Sub-carrier Modulation Answer Request SOF Request_Flags 0x00 POOL EAS 0xA2 IC Mfg code 0x02 CRC16 16 bits Request EOF Table 53. POOL EAS Request Format for Two Sub-carrier Modulation Answer Request SOF Request_Flags 0x01 POOL EAS 0xA2 IC Mfg code 0x02 CRC16 16 bits Request EOF POOL EAS Response Format when the request frame is correctly received The LRI512 generates a continuous stream of 256 bits at `0' using the One or Two sub-carrier modulation at Low data rate ended by 2 CRC bytes. Figure 43. POOL EAS Frame Exchange between VCD and LRI512 VCD SOF POOL EAS Request EOF LRI512 t1 256 O' using Single sub-carrier modulation at Low data rate AI06841 39/54 LRI512 APPENDIX A The following pseudo-code describes how the anti-collision could be implemented on the VCD, using recursive functions. Algorithm for Pulsed Slots function push (mask, address) ; function pop (mask, address) ; function pulse_next_pause ; function store(LRI512_UID) ; pushes on private stack pops from private stack generates a power pulse stores LRI512_UID function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask ; generates new mask ; send the Request mode = anti-collision send_Request (Request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; LRI512 is inventoried then store (LRI512_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty then poll_loop (sub_address_size) collision endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle ; if some collisions have been detected and ; not yet processed, the function calls itself ; recursively to process the last stored 40/54 LRI512 APPENDIX B The CRC Error Detection Method The Cyclic Redundancy Check (CRC) is calculated on all data contained in a message, from the Table 54. CRC Definition CRC Definition CRC Type ISO/IEC 13239 Length 16 bits Polynomial X16 + X12 + X5 + 1 = Ox8408 Direction Backward Preset 0xFFFF Residue 0xF0B8 start of the Flags through to the end of Data. This CRC is used from the VCD to the LRI512, and from the LRI512 to the VCD. To add extra protection against shift errors, a furvalue for the generated CRC is the residue of ther transformation on the calculated CRC is F0B8h made. The One's Complement of the calculated CRC Calculation Example CRC is the value attached to the message for This example in C language illustrates one method transmission. of calculating the CRC on a given set of bytes For checking of received messages the two CRC comprising a message. bytes are often also included in the re-calculation, for ease of use. In this case, given the expected C-Example to calculate or check the CRC16 according to ISO/IEC 13239 #define POLYNOMIAL0x8408// x^16 + x^12 + x^5 + 1 #define PRESET_VALUE0xFFFF #define CHECK_VALUE0xF0B8 #define NUMBER_OF_BYTES4// Example: 4 data bytes #define CALC_CRC1 #define CHECK_CRC0 void main() { unsigned int current_crc_value; unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = NUMBER_OF_BYTES; int calculate_or_check_crc; int i, j; calculate_or_check_crc = CALC_CRC; // calculate_or_check_crc = CHECK_CRC;// This could be an other example if (calculate_or_check_crc == CALC_CRC) { number_of_databytes = NUMBER_OF_BYTES; } else // check CRC { number_of_databytes = NUMBER_OF_BYTES + 2; } current_crc_value = PRESET_VALUE; for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) { 41/54 LRI512 current_crc_value = (current_crc_value >> 1) ^ POLYNOMIAL; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == CALC_CRC) { current_crc_value = ~current_crc_value; printf ("Generated CRC is 0x%04X\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first LSByte, then MSByte) } else // check CRC { if (current_crc_value == CHECK_VALUE) { printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value); } } } 42/54 LRI512 APPENDIX C Application Family Identifier (AFI) The AFI (Application Family Identifier) represents the type of application targeted by the VCD and is used to extract from all the LRI512 present only the LRI512 meeting the required application criteria. It is programmed by the LRI512 issuer (the purchaser of the LRI512). Once locked, it cannot be modified. Table 55. AFI Coding AFI Most Significant Nibble 0 `X' `X' 0 1 2 3 4 5 6 7 8 9 A B C D E F AFI Least Significant Nibble 0 0 `Y' `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' 0, `Y' Meaning VICCs respond from All families and sub-families All sub-families of family X Only the Yth sub-family of family X Proprietary sub-family Y only Transport Financial Identification Telecomunication Medical Multimedia Gaming Data Storage Item Management Express Parcels Postal Services Airline Bags RFU RFU RFU Portable Files, ... Internet services.... Mass transit, Bus, Airline,... IEP, Banking, Retail,... Access Control,... Public Telephony, GSM,... Examples / Note The most significant nibble of AFI is used to code one specific or all application families, as defined in Table 55. The least significant nibble of AFI is used to code one specific or all application sub-families. Subfamily codes other than 0 are proprietary. No applicative preselection Wide applicative preselection Note: X = 1h to Fh, Y = 1h to Fh 43/54 LRI512 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not imTable 56. Absolute Maximum Ratings Symbol Parameter W4 Condition ST antistatic bag, max 23 months Mounted wafer in a wafersawing box (8"), max 25 wafers 40-60% RH, max 2 Years Reels in shrink film and packed in hexagonal cardboard box 40% RH, max 1 year Reels in ST cardboard box Min. 15 Max. 25 Unit C plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. SB A1T/ISOR A1S/ISOR A2T/ISOK C40 VMAX Maximum Input Voltage on AC0 / AC1 A1T/ISOR VESD Electrostatic Discharge Voltage2 A1S/ISOR A2T/ISOK C40 Note: 1. IPC/JEDEC J-STD-020A 2. ESD test: ISO10373-7 specification 15 15 15 15 15 -7 25 25 25 25 25 7 7000 7000 7000 7000 C C C C C V V V V V TSTG Storage Temperature ISO 10373-7 ISO 10373-7 ISO 10373-7 ISO 10373-7 -7000 -7000 -7000 -7000 44/54 LRI512 DC AND AC PARAMETERS This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the MeasureTable 57. Operating Conditions Symbol Parameter A1T/ISOR TA Ambient Operating Temperature A1S/ISOR A2T/ISOK C40 Min. -20 -20 -20 -20 Max. 85 85 85 85 Unit C C C C ment Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. 45/54 LRI512 Figure 44. LRI512 Synchronous Timing, Transmit and Receive A B tRFF tRFR fCC tRFSBL tMAX tMIN CD AI06680 Figure 44 shows an ASK modulated signal, from the VCD to the LRI512. The test condition for the AC/DC parameters are: Table 58. DC Characteristics Symbol VCC Parameter Regulated Voltage A1T/ISOR VRET Retromodulated Induced Voltage A1S/ISOR A2T/ISOK C40 ICC ICC CTUN CTUN Supply Current (Active in Read) Supply Current (Active in Write) Internal Tuning Capacitor Internal Tuning Capacitor - Close coupling condition with tester antenna (1mm) - Gives LRI512 performance on tag antenna Test Condition (in addition to those in Table 57) Min. 1.5 Typ. Max. 3.0 Unit V mV mV mV mV ISO10373-7 ISO10373-7 ISO10373-7 ISO10373-7 Vcc = 3.0V Vcc = 3.0V f=13.56Mhz for W4/22 f=13.56Mhz for W4/30 10 10 10 10 150 400 18.5 26 A A pF pF 46/54 LRI512 Table 59. AC Characteristics Symbol fCC Parameter External RF Signal Frequency MI=(A-B)/(A+B) Test Condition (in addition to those in Table 57) Min. 13.553 10 0 7.1 MI=(A-B)/(A+B) 95 0 7.1 -2 Zero to Maximum field strength induced Voltage on Coil From H-field min FCC/32 FCC/28 4224/FS 4224/FS 313 309 500 A1T/ISOR PA H-field Energy on LRI512 Antenna A1S/ISOR A2T/ISOK C40 tW Programming Time 0.15 0.15 0.15 1 0.1 423.75 484.28 320.9 311.5 1000 322 314 2000 5 5 5 5 5 Typ. 13.56 Max. 13.567 30 3.0 9.44 100 3.5 9.44 +2 3 1 Unit MHz % s s % s s s V/s ms kHz kHz s s A/m A/m A/m A/m ms MICARRIER 10% Carrier Modulation Index tRFR , tRFF tRFSBL 10% Rise and Fall time 10% Minimum Pulse Width for bit MICARRIER 100% Carrier Modulation Index tRFR , tRFF tRFSBL tJIT tMAX tMINCD fSH fSL t1 t2 rL 100% Rise and Fall time 100% Minimum Pulse Width for bit Bit pulse Jitter Maximum Carrier Rise Time Minimum Time from Carrier Generation to First Data Subcarrier Frequency High Subcarrier Frequency Low Time for LRI512 Response Time between Commands Resistive Load (for Modulation) Note: 1. PA Min is the minimum H-field required to communicate with the LRI512 PA Max is the maximum H-field that the device can support before clamping the incoming signal 47/54 LRI512 PACKAGE MECHANICAL A1T/ISOR - Copper Antenna, Package Outline D E C A1 A2 AI06843 Note: Drawing is not to scale. A1T/ISOR - Copper Antenna, Package Mechanical Data millimeters Symbol Typ A1 (Coil Width) A2 (Coil Length) C (Web Width) D (Pitch) E (Coil distance from Web edge) (Overall Thickness of copper antenna coil) (Silicon Thickness) Q (Unloaded Q value) FNOM (Unloaded free-air resonance) 45 76 48 96 Min 44.5 75.5 47.5 95.5 Max 45.5 76.5 48.5 96.5 Typ 1.772 2.992 1.890 3.780 Min 1.752 2.972 1.870 3.760 Max 1.791 3.012 1.909 3.800 inches 1.5 1 2 0.059 0.039 0.079 0.110 0.180 35 0.090 0.165 0.130 0.195 0.004 0.007 35 0.003 0.006 0.005 0.008 14.6 MHz 14.6 MHz 48/54 LRI512 A1S/ISOR - Copper Antenna, Package Outline D E C A1 A2 AI06843 Note: Drawing is not to scale. A1S/ISOR - Copper Antenna, Package Mechanical Data millimeters Symbol Typ A1 (Coil Width) A2 (Coil Length) C (Web Width) D (Pitch) E (Coil distance from Web edge) (Overall Thickness of copper antenna coil) (Silicon Thickness) Q (Unloaded Q value) FNOM (Unloaded free-air resonance) 45 76 48 96 Min 44.5 75.5 47.5 95.5 Max 45.5 76.5 48.5 96.5 Typ 1.772 2.992 1.890 3.780 Min 1.752 2.972 1.870 3.760 Max 1.791 3.012 1.909 3.800 inches 1.5 1 2 0.059 0.039 0.079 0.110 0.180 35 0.090 0.165 0.130 0.195 0.004 0.007 35 0.003 0.006 0.005 0.008 14.6 MHz 14.6 MHz 49/54 LRI512 A2T/ISOK - Aluminium Antenna, Package Outline D E C A1 A2 AI06844 Note: Drawing is not to scale. A2T/ISOK - Aluminium Antenna, Package Mechanical Data millimeters Symbol Typ A1 (Coil Width) A2 (Coil Length) C (Web Width) D (Pitch) E (Coil distance from Web edge) (Overall Thickness of copper antenna coil) (Silicon Thickness) Q (Unloaded Q value) FNOM (Unloaded free-air resonance) 14.6 MHz 14.6 MHz 45 76 48 96 Min 44.5 75.5 47.5 95.5 Max 45.5 76.5 48.5 96.5 Typ 1.772 2.992 1.890 3.780 Min 1.752 2.972 1.870 3.760 Max 1.791 3.012 1.909 3.800 inches 1.5 1 2 0.059 0.039 0.079 0.100 0.180 0.080 0.165 0.120 0.195 0.004 0.007 0.003 0.006 0.005 0.008 50/54 LRI512 C40 - Micromodule Antenna, Package Outline D E C A1 A2 AI06844 Note: Drawing is not to scale. C40 - Micromodule Antenna, Package Mechanical Data millimeters Symbol Typ A1 (Coil Width) A2 (Coil Length) C (Web Width) D (Pitch) E (Coil distance from Web edge) (Overall Thickness of copper antenna coil) (Silicon Thickness) Q (Unloaded Q value) FNOM (Unloaded free-air resonance) 14.4 MHz 14.4 MHz 27.5 27.5 35.0 28.5 Min 27.4 27.4 34.9 28.4 Max 27.6 27.6 35.1 28.6 Typ 1.083 1.083 1.378 1.122 Min 1.079 1.079 1.374 1.118 Max 1.087 1.087 1.382 1.126 inches 3.75 0.148 0.190 0.180 0.187 0.165 0.193 0.195 0.007 0.007 0.007 0.006 0.008 0.008 51/54 LRI512 PART NUMBERING Table 60. Ordering Information Scheme Example: LRI512 W4/22 Delivery Form W4/22 W4/30 180 m 15 m unsawn wafer, 18.5 pF tuning capacitor 180 m 15 m unsawn wafer, 26 pF tuning capacitor SBN18/22 180 m 15 m sawn wafer with bumps, 18.5 pF tuning capacitor, 8-inch frame SBN16/22 180 m 15 m sawn wafer with bumps, 18.5 pF tuning capacitor, 6-inch frame A1T/ISOR ISO Copper Antenna on tape A1S/ISOR ISO Copper Adhesive Antenna on tape A2T/ISOK ISO Aluminium Antenna on tape C40 Micromodule Antenna on Super 35mm tape The notation used for the device number is as shown in Table 60. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please see the current Memory Shortform Catalogue, or contact your nearest ST Sales Office, or email: memories.contactless@st.com 52/54 LRI512 REVISION HISTORY Table 61. Document Revision History Date 16-Jul-2002 Rev. 1.0 Document written Description of Revision 53/54 LRI512 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2002 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. www.st.com 54/54 |
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